In July last year, the JEDEC Solid State Technology Association released the DDR5 SDRAM standard (JESD79-5); today, the association announced an upgrade to the JESD79-5A DDR5 SDRAM standard. This upgrade introduces some new features to improve reliability and performance in a wide range of applications involving client systems and high-performance servers.JESD79-5A is now available for download from the JEDEC website.
The new functions are designed to meet the industry’s needs for improving system reliability, including bounded fault correction support, soft package post-repair (sPPR) undo and lock, memory built-in self-check package post-repair (MBIST and mPPR), and adaptive RFM and MR4 extensions.
JESD79-5A integrates DDR5Timing definition and transmission speed expanded to 6400MT/s (DRAM core timing) and 5600MT/s (IO AC timing), Enabling the industry to build an ecosystem of up to 5600MT/s.
The naming of the core timing parameters and their respective definitions have been modified to closely integrate with the upcoming JEDEC JESD400-5 DDR5 serial presence detection (SPD) content V1.0 standard. The file can be accessed here.
JEDEC Chairman Mian Quddus said: “The fact that DDR5 updates were released so soon after DDR5 was first launched in July 2020 emphasizes JEDEC’s continuous commitment to continuous improvement and represents all relevant member companies for better To serve the collective efforts of the industry”.
Joe Macri, Chief Technology Officer of AMD’s Computing and Graphics Business Unit, said: “AMD is proud of our continued cooperation with JEDEC. We have promoted the development of the high-performance computing industry through powerful improvements to DDR5.” Through the new JESD79-5A DDR5 Standard, JEDEC provides the most advanced memory for high performance and reliability, and continues our joint commitment to achieve the best experience for end users.”
Carolyn Duran, Vice President of Intel Data Platform Group and General Manager of Memory and IO Technology, said: “Intel is committed to advanced technological innovation, which will greatly benefit the industry and our customers. DDR5 represents the next advancement in mainstream memory technology. Play a role in future customer and server platforms. Working with our ecosystem partners and standards associations such as JEDEC will help end customers accelerate the adoption of new technologies and achieve breakthrough computing performance.”
Frank Ross, Micron’s chief architect, said: “To provide the system-level reliability and scalability required by DDR5 for data-centric workloads requires close cooperation. Micron is proud to be able to work with JEDEC and the broad ecosystem to advance Memory standards enable customers to turn data into insights faster.”
● Lanqi Technology
Christopher Cox, Chairman of the JC-42 Memory Committee and Vice President of Strategy and Technology of Lanqi Technology, said: “This new update of DDR5 shows how the industry is committed to working together to build faster and more reliable memory solutions for the enterprise and customer markets in a timely manner. 5G, machine learning and artificial intelligence are driving the speed and progress of the computer industry at an alarming rate. The entire global organization of JEDEC has united to continuously enhance the DDR5 standard to meet these needs.”
Young-Soo Sohn, Vice President of Samsung Electronics’ DRAM Memory Planning/Enablement Group, said: “Samsung is proud to see that DDR5 memory will be able to reach new heights in terms of operating efficiency and self-correction capabilities. The standardization that has been working hard for the past 14 months. With these enhancements, the industry is laying a very solid foundation for one of the most ambitious memory upgrades in history-an advancement that is especially important for large server systems.”
● SK Hynix
Uksong Kang, Head of DRAM Products and Planning at SK hynix, said: “As the new reliability features are now part of the DDR5 standard, SK hynix is pleased to provide our customers with a more powerful memory solution. In addition, we can provide more The high device speed will take the performance of the entire system to the next level. Since 2019, SK hynix has been providing DDR5 DIMM samples to the industry to prepare for the ecosystem and will continue to actively participate in future JEDEC activities. To achieve continuous open innovation and ecosystem”.