There are two series of products with Zen4 architecture and SP5 interface:
One is“Genoa” (Genoa), up to 96 Zen4 cores, 192 threads, and a power consumption range of 200-400W.
two is“Bergamo” (Bergamo), up to 128 Zen4c cores, 256 threads, power consumption range 320-400W.
They all support one-way and two-way configurations,12-channel DDR5 memory, 160 PCIe 5.0 buses, 12 PCIe 3.0 buses, 64 CXL v1.1+ high-speed interconnect buses.
In fact,Genoa also has a derivative version “Genoa-X”, similar to the current Milan-X, which also adds 3D V-Cache stacking cache.
But so far, we are still not sure about the specific difference between Zen4 and Zen4c, maybe the latter is more optimized for cloud computing.
There is no clear code name for products with Zen4 architecture and SP6 interface, the difference is that only single-channel configuration is supported, which is more computationally dense and energy efficient than SP5, and optimized for edge computing and telecom infrastructure.
It has up to 32 Zen4 cores or 64 Zen4c cores, the power consumption range is reduced to 70-225W, and it is reduced to 6-channel DDR5, 96 PCIe 5.0, 8 PCIe 3.0, 48 CXL 1.1+, that is, three points are cut. one to half the size.
The product code of Zen5 architecture is “Turin” (Turin), there are also SP5 and SP6 interface versions, but the specific specifications are not clear for the time being. It is expected that there will be up to 256 cores, 512 threads, and 12 channels of DDR5-6000.
The next generation of product codenamed “Venice” (Venice), It stands to reason that the Zen6 architecture will be used, but I don’t know whether the process will continue to 5nm or upgrade to 3nm?